When data is transmitted through a transmission line or recorded onto a recording medium such as a magnetic disc, an optical disc or a magneto-optical disc, the data is modulated into code matching the transmission line or the recording medium prior to the transmission or recording.
Run length limited codes, generically designated as (d, k) codes, have been widely and successfully applied in modern magnetic and optical recording systems. Such codes, and means for implementing such codes are described by K. A. Schouhamer Immink in the book entitled “Codes for Mass Data Storage Systems” (ISBN 90-74249-23-X, 1999). Run length limited codes are extensions of earlier non return to zero recording codes, where binary recorded “zeros” are represented by no (magnetic flux) change in the recording medium, while binary “ones” are represented by transitions from one direction of recorded flux to the opposite direction.
In a (d, k) code, the above recording rules are maintained with the additional constraints that at least d “zeros” are recorded between successive “ones”, and no more than k “zeros” are recorded between successive “ones”. The first constraint arises to obviate intersymbol interference occurring because of pulse crowding of the reproduced transitions when a series of “ones” are contiguously recorded. The second constraint arises to ensure recovering a clock from the reproduced data by “locking” a phase locked loop to the reproduced transitions. If there is too long an unbroken string of contiguous “zeros” with no interspersed “ones”, the clock regenerating phase-locked-loop will fall out of synchronism. In, for example, a (1,7) code there is at least one “zero” between recorded “ones”, and there are no more than seven recorded contiguous “zeros” between recorded “ones”.
The series of encoded bits is converted, via a modulo-2 integration operation, to a corresponding modulated signal formed by bit cells having a high or low signal value. A “one” bit is represented in the modulated signal by a change from a high to a low signal value or vice versa, and a “zero” bit is represented by the lack of change in the modulated signal.
The information conveying efficiency of such codes is typically expressed as a rate, which is the quotient of the number of bits (m) in the information word to the number of bits (n) in the code word (i.e., m/n). The theoretical maximum rate of a code, given values of d and k, is called the Shannon capacity. FIG. 1 tabulates the Shannon capacity  C(d,k) for d=1 versus k. As shown, for a (1,7) code, the Shannon capacity, C(1,7), has a value of 0.67929. This means that a (1,7) code cannot have a rate larger than 0.67929. The practical implementation of codes requires that the rate be a rational fraction, and to date the above (1,7) code has a rate ⅔. This rate of ⅔ is slightly less than the Shannon capacity of 0.67929, and the code is therefore a highly efficient one. To achieve the ⅔ rate, 2 unconstrained data bits are mapped into 3 constrained encoded bits.
(1,7) codes having a rate of ⅔ and means for implementing associated encoders and decoders are known in the art. U.S. Pat. No. 4,413,251 entitled “Method and Apparatus for Generating A Noiseless Sliding Block Code for a (1,7) Channel with Rate ⅔”, issued in the names of Adler et al., discloses an encoder which is a finite-state machine having 5 internal states. U.S. Pat. No. 4,488,142 entitled “Apparatus for Encoding Unconstrained Data onto a (1,7) Format with Rate ⅔”, issued in the name of Franaszek discloses an encoder having 8 internal states.
However, a demand exists for even more efficient codes so that, for example, the information density on a recording medium or over a transmission line can be increased.